Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
D Type
Input Type
Single Ended
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
5
Number of Elements per Chip
1
Maximum Propagation Delay Time @ Maximum CL
5.2 ns @ 3.3 V
Dimensions
2 x 1.25 x 0.9mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Temperature
-40 °C
Height
0.9mm
Maximum Operating Temperature
+85 °C
Length
2mm
Width
1.25mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
Stock information temporarily unavailable.
Please check again later.
P.O.A.
Production pack (Reel)
10
P.O.A.
Production pack (Reel)
10
Buy in bulk
quantity | Unit price |
---|---|
10 - 240 | P.O.A. |
250 - 990 | P.O.A. |
1000 - 2490 | P.O.A. |
2500 - 4990 | P.O.A. |
5000+ | P.O.A. |
Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
D Type
Input Type
Single Ended
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
5
Number of Elements per Chip
1
Maximum Propagation Delay Time @ Maximum CL
5.2 ns @ 3.3 V
Dimensions
2 x 1.25 x 0.9mm
Maximum Operating Supply Voltage
5.5 V
Minimum Operating Temperature
-40 °C
Height
0.9mm
Maximum Operating Temperature
+85 °C
Length
2mm
Width
1.25mm
Minimum Operating Supply Voltage
1.65 V
Propagation Delay Test Condition
50pF
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22