Nexperia 74LVC11PW,112, Dual 3-Input AND Logic Gate, 14-Pin TSSOP

RS Stock No.: 816-8729Brand: NexperiaManufacturers Part No.: 74LVC11PW,112
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Technical documents

Specifications

Logic Function

AND

Mounting Type

Surface Mount

Number Of Elements

2

Number of Inputs per Gate

3

Schmitt Trigger Input

No

Package Type

TSSOP

Pin Count

14

Logic Family

LVC

Maximum Operating Supply Voltage

3.6 V

Maximum High Level Output Current

-24mA

Maximum Propagation Delay Time @ Maximum CL

7.2 ns @ 50 pF

Minimum Operating Supply Voltage

1.65 V

Maximum Low Level Output Current

24mA

Minimum Operating Temperature

-40 °C

Maximum Operating Temperature

+125 °C

Output Type

Single Ended

Length

5.1mm

Height

0.95mm

Width

4.5mm

Dimensions

5.1 x 4.5 x 0.95mm

Propagation Delay Test Condition

50pF

Product details

74LVC Family Logic Gates

Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS

74LVC Family

P.O.A.

Nexperia 74LVC11PW,112, Dual 3-Input AND Logic Gate, 14-Pin TSSOP
Select packaging type

P.O.A.

Nexperia 74LVC11PW,112, Dual 3-Input AND Logic Gate, 14-Pin TSSOP

Stock information temporarily unavailable.

Select packaging type

Stock information temporarily unavailable.

Technical documents

Specifications

Logic Function

AND

Mounting Type

Surface Mount

Number Of Elements

2

Number of Inputs per Gate

3

Schmitt Trigger Input

No

Package Type

TSSOP

Pin Count

14

Logic Family

LVC

Maximum Operating Supply Voltage

3.6 V

Maximum High Level Output Current

-24mA

Maximum Propagation Delay Time @ Maximum CL

7.2 ns @ 50 pF

Minimum Operating Supply Voltage

1.65 V

Maximum Low Level Output Current

24mA

Minimum Operating Temperature

-40 °C

Maximum Operating Temperature

+125 °C

Output Type

Single Ended

Length

5.1mm

Height

0.95mm

Width

4.5mm

Dimensions

5.1 x 4.5 x 0.95mm

Propagation Delay Test Condition

50pF

Product details

74LVC Family Logic Gates

Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS

74LVC Family