Technical documents
Specifications
Brand
NexperiaLogic Function
Inverter
Input Type
Schmitt Trigger
Number of Elements per Chip
1
Schmitt Trigger Input
Yes
Maximum Propagation Delay Time @ Maximum CL
2.2 ns @ 5 V, 3 ns @ 3.3 V, 3.2 ns @ 2.7 V
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
5
Logic Family
LVC
Dimensions
2.25 x 1.35 x 1mm
Maximum Operating Supply Voltage
5.5 V
Height
1mm
Maximum Operating Temperature
+125 °C
Length
2.25mm
Width
1.35mm
Minimum Operating Supply Voltage
1.65 V
Minimum Operating Temperature
-40 °C
Propagation Delay Test Condition
50pF
Product details
74LVC1G/74LVC2G Family
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
Stock information temporarily unavailable.
Please check again later.
P.O.A.
50
P.O.A.
50
Buy in bulk
quantity | Unit price |
---|---|
50 - 200 | P.O.A. |
250 - 450 | P.O.A. |
500+ | P.O.A. |
Technical documents
Specifications
Brand
NexperiaLogic Function
Inverter
Input Type
Schmitt Trigger
Number of Elements per Chip
1
Schmitt Trigger Input
Yes
Maximum Propagation Delay Time @ Maximum CL
2.2 ns @ 5 V, 3 ns @ 3.3 V, 3.2 ns @ 2.7 V
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
5
Logic Family
LVC
Dimensions
2.25 x 1.35 x 1mm
Maximum Operating Supply Voltage
5.5 V
Height
1mm
Maximum Operating Temperature
+125 °C
Length
2.25mm
Width
1.35mm
Minimum Operating Supply Voltage
1.65 V
Minimum Operating Temperature
-40 °C
Propagation Delay Test Condition
50pF
Product details
74LVC1G/74LVC2G Family
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS