Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Decoder, Demultiplexer
Demultiplexing Capability
1-of-4
Number of Elements per Chip
2
Pin Count
16
Number of Input Enables per Element
1
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
SOIC
Dimensions
9.9 x 3.91 x 1.58mm
Maximum Operating Supply Voltage
3.6 V
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Decoders/Multiplexers, Texas Instruments
Texas Instruments range of Decoders, Multiplexers and De-multiplexers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
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P.O.A.
10
P.O.A.
10
Buy in bulk
quantity | Unit price |
---|---|
10 - 240 | P.O.A. |
250 - 990 | P.O.A. |
1000 - 2490 | P.O.A. |
2500 - 4990 | P.O.A. |
5000+ | P.O.A. |
Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
Decoder, Demultiplexer
Demultiplexing Capability
1-of-4
Number of Elements per Chip
2
Pin Count
16
Number of Input Enables per Element
1
Polarity
Inverting
Mounting Type
Surface Mount
Package Type
SOIC
Dimensions
9.9 x 3.91 x 1.58mm
Maximum Operating Supply Voltage
3.6 V
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+85 °C
Minimum Operating Supply Voltage
1.65 V
Product details
74LVC Family Decoders/Multiplexers, Texas Instruments
Texas Instruments range of Decoders, Multiplexers and De-multiplexers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22