Technical documents
Specifications
Brand
Texas InstrumentsLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
Yes
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Input Type
CMOS, TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
5.5 ns @ 5 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Height
1mm
Maximum Operating Temperature
+125 °C
Width
1.4mm
Minimum Operating Temperature
-40 °C
Dimensions
2.15 x 1.4 x 1mm
Output Type
CMOS
Propagation Delay Test Condition
50pF
Length
2.15mm
Product details
74LVC Family Inverters & Buffers, Texas Instruments
Texas Instruments range of Inverters and Buffers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
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P.O.A.
3000
P.O.A.
3000
Technical documents
Specifications
Brand
Texas InstrumentsLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
1
Number of Inputs per Gate
2
Schmitt Trigger Input
Yes
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Input Type
CMOS, TTL
Maximum Operating Supply Voltage
5.5 V
Maximum High Level Output Current
-32mA
Maximum Propagation Delay Time @ Maximum CL
5.5 ns @ 5 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
32mA
Height
1mm
Maximum Operating Temperature
+125 °C
Width
1.4mm
Minimum Operating Temperature
-40 °C
Dimensions
2.15 x 1.4 x 1mm
Output Type
CMOS
Propagation Delay Test Condition
50pF
Length
2.15mm
Product details
74LVC Family Inverters & Buffers, Texas Instruments
Texas Instruments range of Inverters and Buffers from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22