Technical documents
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Buffer
Number of Channels
2
Schmitt Trigger Input
No
Input Type
Single Ended
Output Type
3 State
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
8
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
11.4ns
Maximum Operating Supply Voltage
5.5 V
Dimensions
3.1 x 3.1 x 0.95mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
3.1mm
Width
3.1mm
Minimum Operating Supply Voltage
1.65 V
Height
0.95mm
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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P.O.A.
Standard
30
P.O.A.
Standard
30
Technical documents
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Buffer
Number of Channels
2
Schmitt Trigger Input
No
Input Type
Single Ended
Output Type
3 State
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
8
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Maximum Propagation Delay Time @ Maximum CL
11.4ns
Maximum Operating Supply Voltage
5.5 V
Dimensions
3.1 x 3.1 x 0.95mm
Minimum Operating Temperature
-40 °C
Maximum Operating Temperature
+125 °C
Length
3.1mm
Width
3.1mm
Minimum Operating Supply Voltage
1.65 V
Height
0.95mm
Product details
74LVC Family Inverters & Buffers
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS