Technical documents
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
8
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
20
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
17 ns @ 1.2 V
Length
6.6mm
Maximum Operating Supply Voltage
3.6 V
Height
0.95mm
Width
4.5mm
Minimum Operating Temperature
-40 °C
Dimensions
6.6 x 4.5 x 0.95mm
Minimum Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Product details
74LVC Family Bus Transceivers, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
74LVC Family
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P.O.A.
75
P.O.A.
75
Technical documents
Specifications
Brand
NexperiaLogic Family
LVC
Logic Function
Bus Transceiver
Number of Elements per Chip
1
Number of Channels per Chip
8
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
TSSOP
Pin Count
20
Input Level
LVTTL
Output Level
LVTTL
Maximum High Level Output Current
-24mA
Maximum Low Level Output Current
24mA
Maximum Propagation Delay Time @ Maximum CL
17 ns @ 1.2 V
Length
6.6mm
Maximum Operating Supply Voltage
3.6 V
Height
0.95mm
Width
4.5mm
Minimum Operating Temperature
-40 °C
Dimensions
6.6 x 4.5 x 0.95mm
Minimum Operating Supply Voltage
1.2 V
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Product details
74LVC Family Bus Transceivers, Nexperia
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS