Texas Instruments SN74LVC00ADR, Quad 2-Input NAND Logic Gate, 14-Pin SOIC
Technical documents
Specifications
Brand
Texas InstrumentsLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
4
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SOIC
Pin Count
14
Logic Family
LVC
Maximum Operating Supply Voltage
3.6 V
Maximum High Level Output Current
-24mA
Maximum Propagation Delay Time @ Maximum CL
4.1 ns @ 3.3 V, 4.9 ns @ 2.7 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
24mA
Height
1.58mm
Width
3.91mm
Minimum Operating Temperature
-40 °C
Dimensions
8.65 x 3.91 x 1.58mm
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
8.65mm
Product details
74LVC Family Logic Gates, Texas Instruments
Texas Instruments range of standard Logic Gates from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating voltage range: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
P.O.A.
1
P.O.A.
1
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Technical documents
Specifications
Brand
Texas InstrumentsLogic Function
NAND
Mounting Type
Surface Mount
Number Of Elements
4
Number of Inputs per Gate
2
Schmitt Trigger Input
No
Package Type
SOIC
Pin Count
14
Logic Family
LVC
Maximum Operating Supply Voltage
3.6 V
Maximum High Level Output Current
-24mA
Maximum Propagation Delay Time @ Maximum CL
4.1 ns @ 3.3 V, 4.9 ns @ 2.7 V
Minimum Operating Supply Voltage
1.65 V
Maximum Low Level Output Current
24mA
Height
1.58mm
Width
3.91mm
Minimum Operating Temperature
-40 °C
Dimensions
8.65 x 3.91 x 1.58mm
Maximum Operating Temperature
+125 °C
Propagation Delay Test Condition
50pF
Length
8.65mm
Product details
74LVC Family Logic Gates, Texas Instruments
Texas Instruments range of standard Logic Gates from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating voltage range: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family