Texas Instruments SN74LVC1G04DCKT CMOS Inverter, 5-Pin SC-70
Technical documents
Specifications
Brand
Texas InstrumentsLogic Function
Inverter
Number of Elements per Chip
1
Schmitt Trigger Input
No
Maximum Propagation Delay Time @ Maximum CL
4.2 ns @ 3.3 V
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Dimensions
2 x 1.25 x 0.9mm
Height
0.9mm
Maximum Operating Supply Voltage
5.5 V
Width
1.25mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Temperature
+85 °C
Propagation Delay Test Condition
50pF
Length
2mm
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family
P.O.A.
1
P.O.A.
Stock information temporarily unavailable.
1
Stock information temporarily unavailable.
Technical documents
Specifications
Brand
Texas InstrumentsLogic Function
Inverter
Number of Elements per Chip
1
Schmitt Trigger Input
No
Maximum Propagation Delay Time @ Maximum CL
4.2 ns @ 3.3 V
Maximum High Level Output Current
-32mA
Maximum Low Level Output Current
32mA
Mounting Type
Surface Mount
Package Type
SC-70
Pin Count
5
Logic Family
LVC
Dimensions
2 x 1.25 x 0.9mm
Height
0.9mm
Maximum Operating Supply Voltage
5.5 V
Width
1.25mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Temperature
+85 °C
Propagation Delay Test Condition
50pF
Length
2mm
Product details
74LVC1G Family, Texas Instruments
Low-Voltage CMOS logic
Single gate package
Operating Voltage: 1.65 to 5.5 V
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 100 mA per JESD 78 Class II
ESD protection exceeds JESD 22
74LVC Family