Texas Instruments SN74LVC374ADW Octal D Type Flip Flop IC, 3-State, 20-Pin SOIC
Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
D Type
Input Type
Single Ended
Output Type
3 State
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
20
Number of Elements per Chip
8
Maximum Propagation Delay Time @ Maximum CL
8.1 ns @ 2.7 V
Dimensions
12.8 x 7.52 x 2.35mm
Maximum Operating Supply Voltage
3.6 V
Width
7.52mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Temperature
+85 °C
Height
2.35mm
Propagation Delay Test Condition
50pF
Length
12.8mm
Product details
74LVC Family Flip-Flops & Latches, Texas Instruments
Texas Instruments range of Flip-Flops and Latches from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
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P.O.A.
25
P.O.A.
25
Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Logic Function
D Type
Input Type
Single Ended
Output Type
3 State
Output Signal Type
Single Ended
Triggering Type
Positive Edge
Polarity
Non-Inverting
Mounting Type
Surface Mount
Package Type
SOIC
Pin Count
20
Number of Elements per Chip
8
Maximum Propagation Delay Time @ Maximum CL
8.1 ns @ 2.7 V
Dimensions
12.8 x 7.52 x 2.35mm
Maximum Operating Supply Voltage
3.6 V
Width
7.52mm
Minimum Operating Temperature
-40 °C
Minimum Operating Supply Voltage
1.65 V
Maximum Operating Temperature
+85 °C
Height
2.35mm
Propagation Delay Test Condition
50pF
Length
12.8mm
Product details
74LVC Family Flip-Flops & Latches, Texas Instruments
Texas Instruments range of Flip-Flops and Latches from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22