Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Product Type
Latch
Logic Function
D Type
Latch Mode
Transparent
Number of Bits
8
Output Type
3 State
Polarity
Non-Inverting
Mount Type
Surface
Minimum Supply Voltage
1.65V
Package Type
TSSOP
Maximum Supply Voltage
3.6V
Pin Count
20
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Width
4.4 mm
Height
1.15mm
Length
6.5mm
Standards/Approvals
No
Series
74LVC
Automotive Standard
No
Product details
74LVC Family Flip-Flops & Latches, Texas Instruments
Texas Instruments range of Flip-Flops and Latches from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
74LVC Family
Stock information temporarily unavailable.
P.O.A.
Production pack (Reel)
250
P.O.A.
Stock information temporarily unavailable.
Production pack (Reel)
250
| quantity | Unit price |
|---|---|
| 250 - 990 | P.O.A. |
| 1000 - 2490 | P.O.A. |
| 2500 - 4990 | P.O.A. |
| 5000+ | P.O.A. |
Technical documents
Specifications
Brand
Texas InstrumentsLogic Family
LVC
Product Type
Latch
Logic Function
D Type
Latch Mode
Transparent
Number of Bits
8
Output Type
3 State
Polarity
Non-Inverting
Mount Type
Surface
Minimum Supply Voltage
1.65V
Package Type
TSSOP
Maximum Supply Voltage
3.6V
Pin Count
20
Minimum Operating Temperature
-40°C
Maximum Operating Temperature
85°C
Width
4.4 mm
Height
1.15mm
Length
6.5mm
Standards/Approvals
No
Series
74LVC
Automotive Standard
No
Product details
74LVC Family Flip-Flops & Latches, Texas Instruments
Texas Instruments range of Flip-Flops and Latches from the 74LVC Family of Low-voltage CMOS Logic ICs. The 74LVC Family use silicon gate CMOS technology and is designed to operate at 3.3V, allowing a significant reduction in power consumption when compared to 5V systems.
Operating Voltage: 1.65 to 3.6V
5V tolerant inputs
Compatibility: Input LVTTL/TTL, Output LVCMOS
Latch-up performance exceeds 250 mA per JESD 17
ESD protection exceeds JESD 22
